Digital Principles and System Design MCQs with answers Page - 8

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Q. In a given combinational circuit, the concurrent statements are used with selected assignments using WHEN and ELSE keyword. What is the other alternative to implement the same?

• (A) with-select
• (B) with-select-when
• (C) if-else
• (D) case

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Correct answer - Option (B)

Explanation:

because only concurrent statements can be used, therefore, with-select is the correct alternative for the method used by the user. but, with-select also requires when keyword to implement the selected assignment.

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Q. For using a process to implement a combinational circuit, which signals should be in the sensitivity list?

• (A) inputs of the circuit
• (B) outputs of the circuit
• (C) both of the inputs and outputs
• (D) no signal should be in the sensitivity list

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Correct answer - Option (A)

Explanation:

in a process used for the implementation of the combinational circuit, all the input signals used which are to be read, should appear in its sensitivity list. in a combinational circuit, there can be many inputs and those inputs should appear in the sensitivity list of the process.

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Q. A 4 to 16 decoder can be used as a code converter. What will be the inputs and outputs of the converter respectively?

• (A) binary, octal
• (B) octal, binary
• (C) hexadecimal, binary
• (D) binary, hexadecimal

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Correct answer - Option (C)

Explanation:

since, 24 = 16, therefore, the decoder can act as hexadecimal to binary converter. because, 4 bits input is converted to 16 bits output. each bit corresponding to 4 output bits. so, clearly it is a hexadecimal to binary convertor.

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Q. Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?

• (A) low input voltages
• (B) synchronous operation
• (C) gate impedance
• (D) cross coupling

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Correct answer - Option (D)

Explanation:

latch is a type of bistable multivibrator having two stable states. both inputs of a latch are directly connected to the other’s output. such types of structure is called cross coupling and due to which latches remain in the latched condition.

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Q. In serial shifting method, data shifting occurs

• (A) universal shift register
• (B) unidirectional shift register
• (C) unipolar shift register
• (D) unique shift register

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Correct answer - Option (B)

Explanation:

the register capable of shifting in one direction is unidirectional shift register. the register capable of shifting in both directions is known as a bidirectional shift register.

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Q. 4 COUNTERS

• (A) 0 to 2n
• (B) 0 to 2n + 1
• (C) 0 to 2n – 1
• (D) 0 to 2n+1/2

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Correct answer - Option (C)

Explanation:

the maximum possible range of bit- count specifically in n-bit binary counter consisting of ‘n’ number of flip-flops is 0 to 2n-1. for say, there is a 2-bit counter, then it will count till 22-1 = 3. thus, it will count from 0 to 3.

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Q. A decimal counter has states.

• (A) 5
• (B) 10
• (C) 15
• (D) 20

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Correct answer - Option (B)

Explanation:

decimal counter is also known as 10 stage counter. so, it has 10 states. it is also known as decade counter counting from 0 to 9.

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Q. A sequential logic can’t be executed by concurrent statements only.

• (A) true
• (B) false
• (C) ---
• (D) ---

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Correct answer - Option (A)

Explanation:

it is true that a sequential logic can’t be executed by concurrent statements only. it requires the sequential statements because they make use of a clock signal.

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Q. Which of the following sequential circuit doesn’t need a clock signal?

• (A) flip flop
• (B) asynchronous counter
• (C) shift register
• (D) latch

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Correct answer - Option (D)

Explanation:

latch has an enable input, but no clock signal. all other circuits including asynchronous counter needs a clock signal. it is called asynchronous because every flip flop doesn’t have same clock signal.

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Q. The following timing diagram shows flip flop.

• (A) t flip-flop
• (B) d flip-flop
• (C) sr flip-flop
• (D) jk flip-flop

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Correct answer - Option (B)

Explanation:

since there is only one input to the flip flop, therefore, it can be either d or t flip flop. but, the output becomes equal to the input signal as soon as there is a positive edge of the clock therefore, it is a delay flip flop.

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