Digital Principles and System Design MCQs with answers Page - 15

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Q. One multiplexer can take the place of

  • (A) several ssi logic gates
  • (B) combinational logic circuits
  • (C) several ex-nor gates
  • (D) several ssi logic gates or combinational logic circuits

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Q. A digital multiplexer is a combinational circuit that selects

  • (A) one digital information from several sources and transmits the selected one
  • (B) many digital information and convert them into one
  • (C) many decimal inputs and transmits the selected information
  • (D) many decimal outputs and accepts the selected information

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Q. In a multiplexer, the selection of a particular input line is controlled by

  • (A) data controller
  • (B) selected lines
  • (C) logic gates
  • (D) both data controller and selected lines

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Q. If the number of n selected input lines is equal to 2^m then it requires select lines.

  • (A) 2
  • (B) m
  • (C) n
  • (D) 2n

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Q. How many select lines would be required for an 8- line-to-1-line multiplexer?

  • (A) 2
  • (B) 4
  • (C) 8
  • (D) 3

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Q. A basic multiplexer principle can be demonstrated through the use of a

  • (A) single-pole relay
  • (B) dpdt switch
  • (C) rotary switch
  • (D) linear stepper

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Q. A basic S-R flip-flop can be constructed by cross- coupling of which basic logic gates?

  • (A) and or or gates
  • (B) xor or xnor gates
  • (C) nor or nand gates
  • (D) and or nor gates

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Q. The circuits of NOR based S-R latch classified as asynchronous sequential circuits, why?

  • (A) because of inverted outputs
  • (B) because of triggering functionality
  • (C) because of cross-coupled connection
  • (D) because of inverted outputs & triggering functionality

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Q. The NAND latch works when both inputs are

  • (A) 1
  • (B) 0
  • (C) inverted
  • (D) don’t cares

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Q. Which of the following line is correct for detecting positive edge of a clock?

  • (A) if (clk’event and clk = ‘0’)
  • (B) if (clk’event and clk = ‘1’)
  • (C) if (clk’event or clk = ‘0’)
  • (D) if (clk’event or clk = ‘1’)

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