Digital Electronics and Logic Design MCQs with answers Page - 52

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Q. The number of clock pulses needed to shift one byte of data from input to the output of a 4-bit shift register is

  • (A) 10
  • (B) 12
  • (C) 16
  • (D) 32

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Q. The main difference between JK and RS flip-flop is that

  • (A) jk flip flop needs a clock pulse
  • (B) there is a feedback in jk lip-lop
  • (C) jk flip-flop accepts both inputs as 1
  • (D) jk flip-flop is acronym of junction cathode multivibra tor

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Q. Which of the following unit will choose to transform decimal number to binary code ?

  • (A) encoder
  • (B) decoder
  • (C) multiplexer
  • (D) counter

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Q. The flip-flops which operate in synchronism with external clock pulses are known as

  • (A) synchronous flip-flop
  • (B) asynchronou s flip-flop
  • (C) either of the above
  • (D) none of these

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Q. Consider an up/down counter that counts between 0 and 15, if external input(X) is “0” the counter counts upward (0000 to 1111) and if external input (X) is “1” the counter counts downward (1111 to 0000), now suppose that the present state is “1100” and X=1, the next state of the counter will be

  • (A) 0
  • (B) 1101
  • (C) 1011
  • (D) 1111

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Q. In a state diagram, the transition from a current state to the next state is determined by

  • (A) current state and the inputs
  • (B) current state and outputs
  • (C) previous state and inputs
  • (D) previous state and outputs

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Q. is used to simplify the circuit that determines the next state.

  • (A) state diagram
  • (B) next state table
  • (C) state reduction
  • (D) state assignmen t

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Q. Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)

  • (A) 1100
  • (B) 11
  • (C) 0
  • (D) 1111

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Q. The diagram given below represents

  • (A) demorgans law
  • (B) associative law
  • (C) product of sum form
  • (D) sum of product form

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Q. The operation of J-K flip-flop is similar to that of the SR flip-flop except that the J-K flip-flop

  • (A) doesn’t have an invalid state
  • (B) sets to clear when both j = 0 and k = 0
  • (C) it does not show transition on change in pulse
  • (D) it does not accept asynchron ous inputs

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