Digital Electronics and Logic Design MCQs with answers Page - 51

Here, you will find a collection of MCQ questions on Digital Electronics and Logic Design. Go through these questions to enhance your preparation for upcoming examinations and interviews.

To check the correct answer, simply click the View Answer button provided for each question.

Have your own questions to contribute? Click the button below to share your MCQs with others!

+ Add Question

A

Admin • 833.24K Points
Coach

Q. The astable multivibrator has

  • (A) two quasi stable states
  • (B) two stable states
  • (C) one stable and one quasi-stable state
  • (D) none of these

A

Admin • 833.24K Points
Coach

Q. How many bits are required to encode all twenty six letters, ten symbols, and ten numerals ?

  • (A) 5
  • (B) 6
  • (C) 10
  • (D) 48

A

Admin • 833.24K Points
Coach

Q. The functional difference between S-R flip-flop and J-K flip-flop is that J- K flip-flop

  • (A) is faster than s- r flip-flop
  • (B) has a feed- back path
  • (C) accepts both inputs 1
  • (D) both (a) and (b)

A

Admin • 833.24K Points
Coach

Q. In a positive edge triggered JK flip-flop, a low J and low K produces

  • (A) no change
  • (B) low state
  • (C) high state
  • (D) none of thes

A

Admin • 833.24K Points
Coach

Q. When an inverter is placed between both inputs of an SR flip-flop, then resulting flip-lop is

  • (A) jk flip-flop
  • (B) d flip-flop
  • (C) sr flip-flop
  • (D) master slave jk flip-flop

A

Admin • 833.24K Points
Coach

Q. The master slave JK lip-flop is effectively a combination of

  • (A) a sr flip-flop and a t flip- flop
  • (B) an sr flip- lfop and a d flip-flop
  • (C) a t flip-flop and a d flip- flop
  • (D) two d flip- flops

A

Admin • 833.24K Points
Coach

Q. It is difficult to design asynhronous sequential circuit because

  • (A) external clock is to be provided
  • (B) it is more complex
  • (C) both (a) and (b)
  • (D) generally they involve stability problem

A

Admin • 833.24K Points
Coach

Q. A stable multivibrator is used as

  • (A) comparator circuit
  • (B) demultiplexe r
  • (C) frequency to voltage converter
  • (D) voltage to frequency converter

A

Admin • 833.24K Points
Coach

Q. How many flip-flop are needed to divide the input frequency by 64 ?

  • (A) 2
  • (B) 5
  • (C) 6
  • (D) 8

A

Admin • 833.24K Points
Coach

Q. 41: In a ripple counter using edge triggered JK flfp-flops, the pulse input is applied to the

  • (A) clock input of all flip-flops
  • (B) clock input of one flip- flops
  • (C) j and k inputs of all flip-flops
  • (D) j and k inputs of one flip- flop

Add MCQ in this Category

If you want to share an MCQ question in this category, it's a great idea! It will be helpful for many other students using this website.

Share Your MCQ

Browse Categories

Click on category to learn MCQs of that category.