Digital Electronics and Logic Design MCQs with answers Page - 38

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Q. To implement the full-adder sum functions, two exclusive-OR gates can be used.

  • (A) true
  • (B) false
  • (C) none of the above
  • (D) can not predict

A

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Q. Which of the following is not a form of multivibrator?

  • (A) astable.
  • (B) monostable.
  • (C) tristable.
  • (D) bistable.

A

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Q. A J-K flip-flop has two control inputs. What happens to the Q output on the active edge of the clock if both control inputs are asserted simultaneously?

  • (A) the q output toggles to the other state.
  • (B) the q output is set to 1.
  • (C) the q output is reset to 0.
  • (D) the q output remains unchanged .

A

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Q. A master/slave bistable is formed using two bistable connected in series.

  • (A) true
  • (B) false
  • (C) ---
  • (D) ---

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Q. An astable has two metastable states and produces the function of a digital oscillator

  • (A) true
  • (B) false
  • (C) ---
  • (D) ---

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Q. In synchronous counters the clock input of each of the bistables are connected together so that each changes state at the same time.

  • (A) true
  • (B) false
  • (C) ---
  • (D) ---

A

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Q. 1: When the maximum clock rate is quoted for a logic family, then it applies to a

  • (A) shift register
  • (B) flip-flop
  • (C) counter
  • (D) multiplexe r

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Q. 2: The number of flip-flops required in a modulo N counter is

  • (A) log2 (n) + 1
  • (B) log2(n-1)
  • (C) log2 (n)
  • (D) n log2 (n)

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Q. 3: Flip-flop outputs are always

  • (A) complimentary
  • (B) the same
  • (C) independent of each other
  • (D) same as previous input

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Q. 4: How many gates (minimum) are needed for a 3-bit up-counter using standard binary and using T lip-lops ? Assume unlimited fan-in.

  • (A) 6
  • (B) 3
  • (C) 2
  • (D) 1

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