Digital Electronics and Logic Design MCQs with answers Page - 43

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Q. Flip flops are also called

  • (A) bi-stable dualvibrators
  • (B) bi-stable transformer
  • (C) bi-stable multivibrator s
  • (D) bi-stable singlevibra tors

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Q. A FIELD-PROGRAMMABLE LOGIC ARRAY CAN BE PROGRAMMED BY THE USER AND NOT BY THE MANUFACTURER.

  • (A) true
  • (B) false
  • (C) ---
  • (D) ---

A

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Q. THE FOUR OUTPUTS OF TWO 4-INPUT MULTIPLEXERS, CONNECTED TO FORM A 16-INPUT
MULTIPLEXER, ARE CONNECTED TOGETHER THROUGH A 4-INPUT
GATE

  • (A) and
  • (B) or
  • (C) nand
  • (D) xor

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Q. A particular half adder has

  • (A) 2 inputs and 1 output
  • (B) 2 inputs and 2 output
  • (C) 3 inputs and 1 output
  • (D) 3 inputs and 2 output

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Q. A full-adder has a Cin = 0. What are the sum (<PRIVATE "TYPE=PICT;ALT=sigma"> ) and the carry (Cout) when A = 1 and B = 1?

  • (A) = 0, cout = 0
  • (B) = 0, cout = 1
  • (C) = 1, cout = 0
  • (D) = 1, cout = 1

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Q. The sequence of states that are implemented by a n-bit Johnson counter is

  • (A) n+2 (n plus 2)
  • (B) 2n (n multiplied by 2)
  • (C) 2n (2 raise to power n)
  • (D) n2 (n raise to power 2)

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Q. A GAL is essentially a .

  • (A) non- reprogrammab le pal
  • (B) pal that is programmed only by the manufacture r
  • (C) very large pal
  • (D) reprogra mmable pal

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Q. The alternate solution for a demultiplexer-register combination circuit is

  • (A) parallel in / serial out shift register
  • (B) serial in / parallel out shift register
  • (C) parallel in / parallel out shift register
  • (D) serial in / serial out shift register

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Q. A transparent mode means

  • (A) the changes in the data at the inputs of the latch are seen at the output
  • (B) the changes in the data at the inputs of the latch are not seen at the output
  • (C) propagation delay is zero (output is immediately changed when clock signal is applied)
  • (D) input hold time is zero (no need to maintain input after clock transition)

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Q. occurs when the same clock signal arrives at different times at different clock inputs due to propagation delay.

  • (A) race condition
  • (B) clock skew
  • (C) ripple effect
  • (D) none of given options

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