Digital Electronics and Logic Design MCQs with answers Page - 33

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Q. Adders

  • (A) adds 2 bits
  • (B) is called so because a full adder involves two half-adders
  • (C) needs two input and generates two output
  • (D) all of these

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Q. Excess-3 code is known as

  • (A) weighted code
  • (B) cyclic redundancy code
  • (C) self- complementi ng code
  • (D) algebraic code.

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Q. The number of control lines for 32 to 1 multiplexer is

  • (A) 4
  • (B) 16
  • (C) 5
  • (D) 6

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Q. The selector inputs to an arithmetic-logic unit (ALU) determine the:

  • (A) selection of
  • (B) arithmetic
  • (C) data word
  • (D) clock

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Q. What are the two types of basic adder circuits?

  • (A) half adder and
  • (B) half adder
  • (C) asynchronou
  • (D) ones

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Q. How many truth tables can be made from one function table ?

  • (A) one
  • (B) two
  • (C) three
  • (D) any numbers

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Q. What is the largest number of data inputs which a data selector with two control inputs can have ?

  • (A) 2
  • (B) 4
  • (C) 8
  • (D) 16

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Q. A combinational circuit is one in which the output depends on the

  • (A) input combination at the time
  • (B) input combination and the previous output
  • (C) input combination at that time and the previous input combination
  • (D) present output and the previous output

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Q. The function of a multiplexer is

  • (A) to decode information
  • (B) to select 1 out of n input data sources and to transmit it to single channel
  • (C) to transit data on n lines
  • (D) to perform serial to parallel conversion

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Q. For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output?

  • (A) low
  • (B) high
  • (C) don care
  • (D) cannot be determine d

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