Digital Electronics and Logic Design MCQs with answers Page - 36

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Q. One reason for using the sum-of-products form is that it can be implemented using all gates without much difficulty.

  • (A) nor
  • (B) nand
  • (C) and
  • (D) door

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Q. When an open occurs on the input of a CMOS gate, the output will .

  • (A) go low, because there is no current in an open circuit
  • (B) react as if the open input were a high
  • (C) go high, since full voltage appears across an open
  • (D) be unpredicta ble; it may go high or low

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Q. In an odd-parity system, the data that will produce a parity bit = 1 is .

  • (A) data = 1010011
  • (B) data = 1111000
  • (C) data = 1100000
  • (D) all of the above

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Q. A Karnaugh map will .

  • (A) eliminate the need for tedious boolean simplifications
  • (B) allow any circuit to be implemented with just and and or gates
  • (C) produce the simplest sum-of- products expression
  • (D) give an overall picture of how the signals flow through the logic circuit

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Q. An 8-bit binary number is input to an odd parity generator. The parity bit will equal 1 only if .

  • (A) the number is odd
  • (B) the number of 1s in the number is odd
  • (C) the number is even
  • (D) the number of 1s in the number is even

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Q. Two 4-bit comparators are cascaded to form an 8-bit comparator. The cascading inputs of the most significant 4 bits should be connected .

  • (A) to the outputs from the least significant 4- bit comparator
  • (B) to the cascading inputs of the least significant 4- bit comparator
  • (C) a = b to a logic high, a < b and a > b to a logic low
  • (D) ground

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Q. When Karnaugh mapping, we must be sure to use the number of loops.

  • (A) maximum
  • (B) minimum
  • (C) median
  • (D) karnaugh

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Q. The final output of a POS circuit is generated by .

  • (A) an and
  • (B) an or
  • (C) a nor
  • (D) a nand

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Q. After each circuit in a subsection of a VHDL program has been , they can be combined and the subsection can be tested.

  • (A) designed
  • (B) tested
  • (C) engineered
  • (D) produced

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Q. The circuit produces a HIGH output whenever the two inputs are equal.

  • (A) exclusive-and
  • (B) exclusive- nand
  • (C) exclusive- nor
  • (D) exclusive- or

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