Digital Logic Circuits (DLC) MCQs with answers Page - 6

Here, you will find a collection of MCQ questions on Digital Logic Circuits (DLC). Go through these questions to enhance your preparation for upcoming examinations and interviews.

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Q. A technique used to reduce the magnitude of threshold voltage of MOSFET is the

  • (A) use of complementary mosfet
  • (B) use of silicon nitride
  • (C) using thin film technology
  • (D) increasing potential of the channel

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Q. What is used to higher the speed of operation in MOSFET fabrication?

  • (A) ceramic gate
  • (B) silicon dioxide
  • (C) silicon nitride
  • (D) poly silicon gate

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Q. Why MOSFET is preferred over BJT in IC components?

  • (A) mosfet has low packing density
  • (B) mosfet has medium packing density
  • (C) mosfet has high packing density
  • (D) mosfet has no packing density

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Q. Critical defects per unit chip area is for a MOS transistor.

  • (A) high
  • (B) low
  • (C) neutral
  • (D) very high

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Q. MOS is being used in

  • (A) lsi
  • (B) vlsi
  • (C) msi
  • (D) both lsi and vlsi

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Q. The D flip-flop has output/outputs.

  • (A) 2
  • (B) 3
  • (C) 4
  • (D) 1

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Q. A D flip-flop can be constructed from an _ flip-flop.

  • (A) s-r
  • (B) j-k
  • (C) t
  • (D) s-k

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Q. In D flip-flop, if clock input is HIGH & D=1, then output is

  • (A) 0
  • (B) 1
  • (C) forbidden
  • (D) toggle

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Q. Which of the following is correct for a gated D flip-flop?

  • (A) the output toggles if one of the inputs is held high
  • (B) only one of the inputs can be high at a time
  • (C) the output complement follows the input when enabled
  • (D) q output follows the input d when the enable is high

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