Digital Logic Circuits (DLC) MCQs with answers Page - 33

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Q. What happens if the input is low in FSM?

  • (A) change of state
  • (B) no transition in state
  • (C) remains in a single state
  • (D) invalid state

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Q. . In FSM diagram what does circle represent?

  • (A) change of state
  • (B) state
  • (C) output value
  • (D) initial state

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Q. In the FSM diagram, what does arrow between the circles represent?

  • (A) change of state
  • (B) state
  • (C) output value
  • (D) initial state

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Q. . In the FSM diagram, what does the information below the line in the circle represent?

  • (A) change of state
  • (B) state
  • (C) output value
  • (D) initial state

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Q. Moore machine has states than a mealy machine.

  • (A) fewer
  • (B) more
  • (C) equal
  • (D) negligible

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Q. State transition happens in every clock cycle.

  • (A) once
  • (B) twice
  • (C) thrice
  • (D) four times

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Q. Output values of mealy type FSM are determined by its

  • (A) input values
  • (B) output values
  • (C) both input values and current state
  • (D) current state

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Q. What kind of output does mealy machine produce?

  • (A) asynchronous
  • (B) synchronous
  • (C) level
  • (D) pulsed

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Q. States in FSM are represented by

  • (A) bits
  • (B) bytes
  • (C) word
  • (D) character

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Q. What is the first step in writing the VHDL for an FSM?

  • (A) to define the vhdl entity
  • (B) naming the entity
  • (C) defining the data type
  • (D) creating the states

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