Digital Logic Circuits (DLC) MCQs with answers Page - 2

Here, you will find a collection of MCQ questions on Digital Logic Circuits (DLC). Go through these questions to enhance your preparation for upcoming examinations and interviews.

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Q. A disadvantage of DTL is

  • (A) the input transistor to the resister
  • (B) the input resister to the transistor
  • (C) the increased fan-in
  • (D) the increased fan-out

A

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Q. Compatibility refers to

  • (A) the output of a circuit should match with the input of another circuit
  • (B) the output of a circuit should match with the input of the same circuit
  • (C) the input of a circuit should match with the output of another circuit
  • (D) the input of a circuit should match with the output of same circuit

A

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Q. The method of connecting a driving device to a loading device is known as

  • (A) compatibility
  • (B) interface
  • (C) sourcing
  • (D) sinking

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Q. The first CML logic was introduced by General Electric in

  • (A) 1960
  • (B) 1981
  • (C) 1961
  • (D) 1990

A

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Q. Schottky families prevent the saturating using

  • (A) transistors
  • (B) schottky transistors
  • (C) diodes
  • (D) schottky diodes

A

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Q. The basic idea of basic CML circuit came from an

  • (A) inverter
  • (B) buffer
  • (C) transistor
  • (D) both inverter and buffer

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Q. The full form of MECL is

  • (A) mono emitter coupled logic
  • (B) motorola emitter coupled logic
  • (C) motorola emitter capacitor logic
  • (D) both mono emitter and motorola coupled logic

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Q. Motorola has offered MECL circuits in logic families.

  • (A) 3
  • (B) 4
  • (C) 5
  • (D) 6

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Q. The latest entrant to the ECL family is

  • (A) ecl 10k
  • (B) ecl 100k
  • (C) ecl 1000k
  • (D) ecl 10000k

A

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Q. All input of NOR as low produces result as

  • (A) low
  • (B) mid
  • (C) high
  • (D) high impedance

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