Digital Logic Circuits (DLC) MCQs with answers Page - 12

Here, you will find a collection of MCQ questions on Digital Logic Circuits (DLC). Go through these questions to enhance your preparation for upcoming examinations and interviews.

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Q. How can parallel data be taken out of a shift register simultaneously?

  • (A) use the q output of the first ff
  • (B) use the q output of the last ff
  • (C) tie all of the q outputs together
  • (D) use the q output of each ff

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Q. What is meant by parallel load of a shift register?

  • (A) all ffs are preset with data
  • (B) each ff is loaded with data, one at a time
  • (C) parallel shifting of data
  • (D) all ffs are set with data

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Q. After three clock pulses, the register contains

  • (A) 01110
  • (B) 00001
  • (C) 00101
  • (D) 00110

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Q. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first)

  • (A) 1100
  • (B) 0011
  • (C) 0000
  • (D) 1111

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Q. In digital logic, a counter is a device which

  • (A) counts the number of outputs
  • (B) stores the number of times a particular event or process has occurred
  • (C) stores the number of times a clock pulse rises and falls
  • (D) counts the number of inputs

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Q. A counter circuit is usually constructed of

  • (A) a number of latches connected in cascade form
  • (B) a number of nand gates connected in cascade form
  • (C) a number of flip-flops connected in cascade
  • (D) a number of nor gates connected in cascade form

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Q. How many types of the counter are there?

  • (A) 2
  • (B) 3
  • (C) 4
  • (D) 5

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Q. A decimal counter has states.

  • (A) 5
  • (B) 10
  • (C) 15
  • (D) 20

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Q. Ripple counters are also called

  • (A) ssi counters
  • (B) asynchronous counters
  • (C) synchronous counters
  • (D) vlsi counters

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Q. Synchronous counter is a type of

  • (A) ssi counters
  • (B) lsi counters
  • (C) msi counters
  • (D) vlsi counters

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