Digital Logic Circuits (DLC) MCQs with answers Page - 16

Here, you will find a collection of MCQ questions on Digital Logic Circuits (DLC). Go through these questions to enhance your preparation for upcoming examinations and interviews.

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Q. In PIPO shift register, parallel data can be taken out by

  • (A) using the q output of the first flip-flop
  • (B) using the q output of the last flip-flop
  • (C) using the q output of the second flip-flop
  • (D) using the q output of each flip-flop

A

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Q. Four bits shift register enables shift control signal in how many clock pulses?

  • (A) two clock pulses
  • (B) three clock pulses
  • (C) four clock pulses
  • (D) five clock pulses

A

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Q. Time taken by the shift register to transfer the content is called

  • (A) clock duration
  • (B) bit duration
  • (C) word duration
  • (D) duration

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Q. Transfer of one bit of information at a time is called

  • (A) rotating
  • (B) serial transfer
  • (C) parallel transfer
  • (D) shifting

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Q. In gated D latch, which of the following is the input symbol?

  • (A) d
  • (B) q
  • (C) en
  • (D) clk

A

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Q. Which of the following is true about packages?

  • (A) package is collection of libraries
  • (B) library is collection of packages
  • (C) package is collection of entities
  • (D) entity is collection of packages

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Q. A package may consist of design units.

  • (A) 2
  • (B) 3
  • (C) 4
  • (D) 5

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Q. Any item declared in a package declaration section are visible to

  • (A) every design unit
  • (B) package body only
  • (C) library containing that package
  • (D) design unit that use the package

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Q. Which of the following is not a in-built package in VHDL?

  • (A) std_logic_1164
  • (B) textio
  • (C) standard
  • (D) std

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Q. Packages increases of the code.

  • (A) reusability
  • (B) readability
  • (C) managing
  • (D) resolution

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