Digital Electronics and Logic Design MCQs with answers Page - 31

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Q. A combinational logic circuit which sends data coming from a single source to two or more separate destinations is

  • (A) decoder
  • (B) encoder
  • (C) multiplexer
  • (D) demultiple xer

A

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Q. Data can be changed from special code to temporal code by using

  • (A) shift registers
  • (B) counters
  • (C) combination al circuits
  • (D) a/d converters

A

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Q. Odd parity of word can beconveniently tested by

  • (A) or gate
  • (B) and gate
  • (C) nor gate
  • (D) xor gate

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Q. Which one of the following will give the sum of full adders as output ?

  • (A) three point majority circuit
  • (B) three bit parity checker
  • (C) three bit comparator
  • (D) three bit counter

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Q. The number of full and half-adders required to add 16-bit numbers is

  • (A) 8 half-adders, 8 full-adders
  • (B) 1 half-adder, 15 full- adders
  • (C) 16 half- adders, 0 full- adders
  • (D) 4 half- adders, 12 full-adders

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Q. A one-to-four line demultiplexer is to be implemented using a memory. How many bits must each word have ?

  • (A) 1 bit
  • (B) 2 bits
  • (C) 4 bits
  • (D) 8 bits

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Q. What logic function is produced by adding an inverter to the output of an AND gate ?

  • (A) nand
  • (B) nor
  • (C) xor
  • (D) or

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Q. A demultiplexer is used to

  • (A) route the data from single input to one of many outputs
  • (B) select data from several inputs and route it to single output
  • (C) perform serial to parallel conversion
  • (D) all of these

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Q. How many full adders are required to construct an m-bit parallel adder ?

  • (A) m/2
  • (B) m-1
  • (C) m
  • (D) m+1

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Q. Parallel adders are

  • (A) combinational logic circuits
  • (B) sequential logic circuits
  • (C) both (a) and (b)
  • (D) none of these

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