Digital Logic Circuits (DLC) MCQs with answers Page - 23

Here, you will find a collection of MCQ questions on Digital Logic Circuits (DLC). Go through these questions to enhance your preparation for upcoming examinations and interviews.

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Q. What is a trigger pulse?

  • (A) a pulse that starts a cycle of operation
  • (B) a pulse that reverses the cycle of operation
  • (C) a pulse that prevents a cycle of operation
  • (D) a pulse that enhances a cycle of operation

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Q. A latch is an example of a

  • (A) monostable multivibrator
  • (B) astable multivibrator
  • (C) bistable multivibrator
  • (D) 555 timer

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Q. Latch is a device with

  • (A) one stable state
  • (B) two stable state
  • (C) three stable state
  • (D) infinite stable states

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Q. Why latches are called a memory devices?

  • (A) it has capability to stare 8 bits of data
  • (B) it has internal memory of 4 bit
  • (C) it can store one bit of data
  • (D) it can store infinite amount of data

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Q. Two stable states of latches are

  • (A) astable & monostable
  • (B) low input & high output
  • (C) high output & low output
  • (D) low output & high input

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Q. How many types of latches are __

  • (A) 4
  • (B) 3
  • (C) 2
  • (D) 5

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Q. The full form of SR is

  • (A) system rated
  • (B) set reset
  • (C) set ready
  • (D) set rated

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Q. The SR latch consists of

  • (A) 1 input
  • (B) 2 inputs
  • (C) 3 inputs
  • (D) 4 inputs

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Q. The outputs of SR latch are

  • (A) x and y
  • (B) a and b
  • (C) s and r
  • (D) q and q’

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Q. The first step of analysis procedure of SR latch is to

  • (A) label inputs
  • (B) label outputs
  • (C) label states
  • (D) label tables